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(parent: b5f4f7c) | patch
ISACaller (actually RADIXMMU) only do virtual memory mode
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Dec 2021 14:41:32 +0000 (14:41 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 21 Dec 2021 14:42:36 +0000 (14:42 +0000)
commitc992eacdcf518fd6614a1b27711d74a45bf13755
tree48a9ab67036d391ef3f8413d8eef9e6dea5b05dctree
parentb5f4f7c6e66cccfdddd14cd2997a2a292893b597commit | diff
ISACaller (actually RADIXMMU) only do virtual memory mode
when MSR.DR is set (which is virtual memory requested bit)
src/openpower/decoder/isa/radixmmu.py diff | blob | history