intel: limit shader geometry on BDW GT1
authorRoss Zwisler <zwisler@chromium.org>
Thu, 19 Dec 2019 02:56:24 +0000 (19:56 -0700)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 20 Dec 2019 10:47:52 +0000 (10:47 +0000)
commitcabcbb4db0fcc6bc204169b1ba0deca4561e67ee
tree60f67df50d268bf70a50897388d4d58166c9a9e6
parentc57337bbd3e3620bcb0f38d23f43ea58c382737d
intel: limit shader geometry on BDW GT1

Similar to the SKL GT1 fix introduced here:

https://gitlab.freedesktop.org/asimiklit/mesa/commit/b1ba7ffdbd54fdb5da18d086c7b7a830e06a1cff

we need to limit the .urb.max_entries[MESA_SHADER_GEOMETRY] on BDW GT1
to address failures in these two tests:

dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_3d
dEQP-GLES31.functional.geometry_shading.layered.render_with_default_layer_2d_array

The value 690 was found via bisection.  691 is the actual max on the
hardware I'm using, but 690 seemed like a nice round number.

Signed-off-by: Ross Zwisler <zwisler@google.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3173>
src/intel/dev/gen_device_info.c