Get SPARC to the point that it starts running. Add ability to load the ROM bin files...
authorAli Saidi <saidi@eecs.umich.edu>
Thu, 9 Nov 2006 23:22:46 +0000 (18:22 -0500)
committerAli Saidi <saidi@eecs.umich.edu>
Thu, 9 Nov 2006 23:22:46 +0000 (18:22 -0500)
commitcb172d0332ecf4ff7f6329f1172d8e1cf78767e2
tree1ccfc27346a63acf9510f43c7590204c6bb72ab9
parentf4aa4e43c41fa688abbee9dfa5b2a35a44b2dcf5
Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit
Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work.

SConstruct:
    Add TARGET_ISA to the list of environment variables that end up in the build_env for python
configs/common/FSConfig.py:
    add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now
src/SConscript:
    add a raw file object, at least until we get more info about how to compile openboot properly
src/arch/sparc/system.cc:
src/arch/sparc/system.hh:
    add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM
src/base/loader/object_file.cc:
src/base/loader/object_file.hh:
    add option to try raw when nothing works
src/cpu/exetrace.cc:
    cleanup lockstep printing a little bit
src/cpu/m5legion_interface.h:
    change the instruction to be 32 bits because it is
src/mem/physical.cc:
    fix assert that doesn't work if memory starts somewhere above 0
src/python/m5/objects/BaseCPU.py:
    Add if statement to choose between sparc tlbs and alpha tlbs
src/python/m5/objects/System.py:
    Add a sparc system that sets the rom addresses correctly
src/python/m5/params.py:
    add the ability to add Addr() together

--HG--
extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af
16 files changed:
SConstruct
configs/common/FSConfig.py
src/SConscript
src/arch/sparc/system.cc
src/arch/sparc/system.hh
src/base/loader/object_file.cc
src/base/loader/object_file.hh
src/base/loader/raw_object.cc [new file with mode: 0644]
src/base/loader/raw_object.hh [new file with mode: 0644]
src/cpu/exetrace.cc
src/cpu/m5legion_interface.h
src/mem/physical.cc
src/python/m5/objects/BaseCPU.py
src/python/m5/objects/SparcTLB.py [new file with mode: 0644]
src/python/m5/objects/System.py
src/python/m5/params.py