gdb/riscv: fix gdb.arch/riscv-unwind-long-insn.exp on RV64

gdb/riscv: fix gdb.arch/riscv-unwind-long-insn.exp on RV64

I noticed that the gdb.arch/riscv-unwind-long-insn.exp test was
failing when run on a 64-bit RISC-V target.

The problem was that GDB was failing to stop after a finish command,
and was then running to an unexpected location.

The reason GDB failed to stop at the finish breakpoint was that the
frame-id of the inferior, when we reached the finish breakpoint,
didn't match the expected frame-id that was stored on the breakpoint.

The reason for this mismatch was that the assembler code that is
included in this test, was written only taking 32-bit RISC-V into
account, as a result, the $fp register was being corrupted, and this
was causing the frame-id mismatch.

Specifically, the $fp register would end up being sign-extended from
32 to 64 bits.  If the expected $fp value has some significant bits
above bit 31 then the computed and expected frame-ids would not match.

To fix this I propose merging the two .s files into a single .S file,
and making use of preprocessor macros to specialise the file for the
correct size of $fp.  There are plenty of existing tests that already
make use of preprocessor macros in assembler files, so I assume this
approach is fine.

Once I'd decided to make use of preprocessor macros to solve the 32/64
bit issue, then I figured I might as well merge the two test assembler
files, they only differed by a single instruction.

With this change in place I now see this test fully passing on 32 and
64 bit RISC-V targets.