Merge pull request #916 from YosysHQ/map_cells_before_map_luts
authorClifford Wolf <clifford@clifford.at>
Mon, 22 Apr 2019 07:01:00 +0000 (09:01 +0200)
committerGitHub <noreply@github.com>
Mon, 22 Apr 2019 07:01:00 +0000 (09:01 +0200)
commitcbd9b8a3f38b15874d36e5ba116536a981756411
tree080b5e2902cb56ce5a5a6c6c34e69d25a2819972
parent19fd411e77be57eb6b7a273b8acaa25d462186ef
parenta3371e118b05eb9bd5dddb1c20758674ae50a803
Merge pull request #916 from YosysHQ/map_cells_before_map_luts

synth_xilinx to map_cells before map_luts