vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.
authorEric Anholt <eric@anholt.net>
Fri, 31 Jul 2015 18:46:56 +0000 (11:46 -0700)
committerEric Anholt <eric@anholt.net>
Wed, 5 Aug 2015 00:19:01 +0000 (17:19 -0700)
commitcc8fb2904673588d31b660dbfaf692615b5202dd
tree9eb8039f76db45555999e01939ce7a932c5398a6
parent9b403c0756ecf806a8ff768bd73a4cbf42986bdb
vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.

Previously, SFU values always moved to a temporary, and TLB color reads
and texture reads always lived in r4.  Instead, we can have these results
just be normal temporaries, and the register allocator can leave the
values in r4 when they don't interfere with anything else using r4.

shader-db results:
total instructions in shared programs: 100809 -> 100040 (-0.76%)
instructions in affected programs:     42383 -> 41614 (-1.81%)
src/gallium/drivers/vc4/vc4_context.h
src/gallium/drivers/vc4/vc4_opt_copy_propagation.c
src/gallium/drivers/vc4/vc4_opt_cse.c
src/gallium/drivers/vc4/vc4_program.c
src/gallium/drivers/vc4/vc4_qir.c
src/gallium/drivers/vc4/vc4_qir.h
src/gallium/drivers/vc4/vc4_qpu_emit.c
src/gallium/drivers/vc4/vc4_register_allocate.c