projects / yosys.git / commit
| author | Miodrag Milanovic <mmicko@gmail.com> | |
| Sat, 15 Feb 2020 09:36:44 +0000 (10:36 +0100) | ||
| committer | Miodrag Milanovic <mmicko@gmail.com> | |
| Sat, 15 Feb 2020 09:36:44 +0000 (10:36 +0100) | ||
| commit | cd5c1777393acf2ebf66f6e6b0aa600f1efbd408 | |
| tree | e16349b29b74d76030673a5dffe93a2bb3b0fd45 | tree |
| parent | a7df492243dbf186037b577657a65e357e8e0fec | commit | diff |
| techlibs/achronix/Makefile.inc | [changed mode: 0755->0644] | blob | history |
| techlibs/achronix/speedster22i/cells_arith.v | [changed mode: 0755->0644] | blob | history |
| techlibs/achronix/speedster22i/cells_map.v | [changed mode: 0755->0644] | blob | history |
| techlibs/achronix/speedster22i/cells_sim.v | [changed mode: 0755->0644] | blob | history |
| techlibs/achronix/synth_achronix.cc | [changed mode: 0755->0644] | blob | history |