add LD-half-swap for i-DCT which does not work. redesign needed
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 1 Aug 2021 09:30:53 +0000 (10:30 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 1 Aug 2021 09:30:53 +0000 (10:30 +0100)
commitcd99a39cc763bfe1aa30b1bfa3b477761caa049f
tree92354bbe31674d0f0482a03563b4fa0c2d0aa313
parent479e354d6c7e75e0321db39c4a76745bc0a35567
add LD-half-swap for i-DCT which does not work. redesign needed
openpower/isa/simplev.mdwn
src/openpower/decoder/isa/remap_dct_yield.py
src/openpower/decoder/isa/test_caller_svp64_ldst.py