Minor fixes for full-system timing memory.
authorSteve Reinhardt <stever@eecs.umich.edu>
Tue, 23 May 2006 21:16:45 +0000 (17:16 -0400)
committerSteve Reinhardt <stever@eecs.umich.edu>
Tue, 23 May 2006 21:16:45 +0000 (17:16 -0400)
commitcf826ae296a4277bdf2ce46e4484295efde5a3c2
treebab4ed90c6c4f71b448fcf795abd6ada66c98fdb
parent20051d41d50a717b6aa384e59039ca987c284932
Minor fixes for full-system timing memory.
Need to rewrite bus bridge to get any further.

src/dev/io_device.cc:
    Set packet dest on timing responses.
src/mem/bus.cc:
    Fix dest addr bounds check assertion.
    Add assertion to catch infinite loopbacks.
src/mem/physical.cc:
    Add comment.

--HG--
extra : convert_revision : 419b65a3a61e2d099884dbda117b338dffd80896
src/dev/io_device.cc
src/mem/bus.cc
src/mem/physical.cc