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(parent: c016f6a) | patch
Fixes xc7 BRAM36s
authorMaciej Dudek <mdudek@antmicro.com>
Thu, 29 Jul 2021 19:10:02 +0000 (21:10 +0200)
committerMarcelina Kościelnicka <mwk@0x04.net>
Fri, 30 Jul 2021 14:17:22 +0000 (16:17 +0200)
commitcfddef5d7d265d2260aad2d6ea8595f8b660eb6a
tree09b9f1983c37497f7d96060f91990ad062e7934atree
parentc016f6a4236fb970196f35c2afb0f2c7c237a77fcommit | diff
Fixes xc7 BRAM36s

UG473 from Xilinx states that 15 bit should always be set if RAMB isn't in cascade mode.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
techlibs/xilinx/xc7_brams_map.v diff | blob | history