rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector memory...
authorMichael Meissner <meissner@linux.vnet.ibm.com>
Sat, 30 Jul 2016 22:31:16 +0000 (22:31 +0000)
committerMichael Meissner <meissner@gcc.gnu.org>
Sat, 30 Jul 2016 22:31:16 +0000 (22:31 +0000)
commitd0047a2538bc3381a7cf94e714f05b4b96799f6d
treece2e857add0d8aafaac59fbb99998feafea30d1f
parente4f7a5dffe280edf9dcc57f50005fac5f71fcccb
rs6000-protos.h (rs6000_adjust_vec_address): New function that takes a vector memory address...

[gcc]
2016-07-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

* config/rs6000/rs6000-protos.h (rs6000_adjust_vec_address): New
function that takes a vector memory address, a hard register, an
element number and a temporary base register, and recreates an
address that points to the appropriate element within the vector.
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Likewise.
(rs6000_split_vec_extract_var): Add support for the target of a
vec_extract with variable element number being a scalar memory
location.
(rtx_is_swappable_p): VLSO insns (UNSPEC_VSX_VSLOW) are not
swappable.
* config/rs6000/vsx.md (vsx_extract_<mode>_load): Replace
vsx_extract_<mode>_load insn with a new insn that optimizes
storing either element to a memory location, using scratch
registers to pick apart the vector and reconstruct the address.
(vsx_extract_<P:mode>_<VSX_D:mode>_load): Likewise.
(vsx_extract_<mode>_store): Rework alternatives to more correctly
support Altivec registers.  Add support for ISA 3.0 Altivec d-form
store instruction.
(vsx_extract_<mode>_var): Add support for extracting a variable
element number from memory.

[gcc/testsuite]
2016-07-30  Michael Meissner  <meissner@linux.vnet.ibm.com>

* gcc.target/powerpc/vec-extract-2.c: New tests for vec_extract of
vector double or vector long where the vector is in memory.
* gcc.target/powerpc/vec-extract-3.c: Likewise.
* gcc.target/powerpc/vec-extract-4.c: Likewise.

From-SVN: r238908
gcc/ChangeLog
gcc/config/rs6000/rs6000-protos.h
gcc/config/rs6000/rs6000.c
gcc/config/rs6000/vsx.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/vec-extract-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/vec-extract-4.c [new file with mode: 0644]