projects / gcc.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: e67bbd5) | patch
re PR target/72804 (Poor code gen with -mvsx-timode)
authorPeter Bergner <bergner@vnet.ibm.com>
Thu, 17 Aug 2017 15:56:48 +0000 (10:56 -0500)
committerPeter Bergner <bergner@gcc.gnu.org>
Thu, 17 Aug 2017 15:56:48 +0000 (10:56 -0500)
commitd00fdf85796a83a6b38f5cb16e287ba31bae7ce8
treef019b66b3d5f8798d9836de79ea870a28f20f711tree
parente67bbd5da485d131c174d9a65669d3cb78057a8dcommit | diff
re PR target/72804 (Poor code gen with -mvsx-timode)

gcc/
PR target/72804
* config/rs6000/vsx.md (*vsx_le_permute_<mode>): Add support for
operands residing in integer registers.
(*vsx_le_perm_load_<mode>): Likewise.
(*vsx_le_perm_store_<mode>): Likewise.
(define_peephole2): Add peepholes to optimize the above.

gcc/testsuite/
PR target/72804
* gcc.target/powerpc/pr72804.c: New test.

From-SVN: r251153
gcc/ChangeLog diff | blob | history
gcc/config/rs6000/vsx.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/powerpc/pr72804.c [new file with mode: 0644] blob