[arm] Recognize thumb2 16-bit variants of the add and compare instructions
authorRichard Earnshaw <rearnsha@arm.com>
Fri, 9 Aug 2019 15:33:18 +0000 (15:33 +0000)
committerRichard Earnshaw <rearnsha@gcc.gnu.org>
Fri, 9 Aug 2019 15:33:18 +0000 (15:33 +0000)
commitd092f6fce920a07d6dd319105ccf1cb9db05d029
tree92bda1b70fba7c036ba1306c83562b871aedfa56
parent9c4cb8615fc71a117c00844fd608ae6788acfd92
[arm] Recognize thumb2 16-bit variants of the add and compare instructions

The addsi3_compare_op[12] patterns currently only have constraints to
pick the 32-bit variants of the instructions.  Although the assembler
may sometimes opportunistically match a 16-bit t2 instruction, there's
no real control over that within the compiler.  Consequently we might
emit a 32-bit adds instruction with a 16-bit subs instruction would
serve equally well.  We do, of course still have to be careful about
the small number of boundary cases by controlling the order quite
carefully.

This patch adds the constraints and templates to match the t2 16-bit
variants of these instructions.  Now, for example, we can generate

    subs r0, r0, #1 // 16-bit instruction

instead of

    adds r0, r0, #1 // 32-bit instruction.

*confit/arm/arm.md (addsi3_compare_op1): Add 16-bit thumb-2 variants.
(addsi3_compare_op2): Likewise.

From-SVN: r274237
gcc/ChangeLog
gcc/config/arm/arm.md