git.libre-soc.org Git - gem5.git/commit

author	Andreas Hansson <andreas.hansson@arm.com>
	Mon, 16 Feb 2015 08:33:28 +0000 (03:33 -0500)
committer	Andreas Hansson <andreas.hansson@arm.com>
	Mon, 16 Feb 2015 08:33:28 +0000 (03:33 -0500)
commit	d0e1b8a19c6d58a49e5288938e9b12f3f10b9f51
tree	f990864e7fb9ffaf11e3895e8337737941390aa2	tree
parent	07ce60bdfa57eedf00f533704b5a2da3fa01b553	commit \| diff

arch: Make readMiscRegNoEffect const throughout

Finally took the plunge and made this apply to all ISAs, not just ARM.

18 files changed:

src/arch/alpha/isa.cc		diff \| blob \| history
src/arch/alpha/isa.hh		diff \| blob \| history
src/arch/mips/isa.cc		diff \| blob \| history
src/arch/mips/isa.hh		diff \| blob \| history
src/arch/power/isa.hh		diff \| blob \| history
src/arch/sparc/isa.cc		diff \| blob \| history
src/arch/sparc/isa.hh		diff \| blob \| history
src/arch/x86/isa.cc		diff \| blob \| history
src/arch/x86/isa.hh		diff \| blob \| history
src/cpu/checker/cpu.hh		diff \| blob \| history
src/cpu/checker/thread_context.hh		diff \| blob \| history
src/cpu/minor/exec_context.hh		diff \| blob \| history
src/cpu/o3/cpu.cc		diff \| blob \| history
src/cpu/o3/cpu.hh		diff \| blob \| history
src/cpu/o3/thread_context.hh		diff \| blob \| history
src/cpu/simple/base.hh		diff \| blob \| history
src/cpu/simple_thread.hh		diff \| blob \| history
src/cpu/thread_context.hh		diff \| blob \| history