cpu: Add a memory access predicate
authorGiacomo Gabrielli <giacomo.gabrielli@arm.com>
Tue, 23 Oct 2018 12:51:52 +0000 (13:51 +0100)
committerGiacomo Gabrielli <giacomo.gabrielli@arm.com>
Sat, 11 May 2019 09:34:27 +0000 (09:34 +0000)
commitd0e4cdc9c36466a3dbef8c9f9f509cce8f1a6c34
tree231e5efecbf42e376b5175affddb88304f485013
parentc4bc23453133751a1a5858743e6b1266f735d3dc
cpu: Add a memory access predicate

This changeset introduces a new predicate to guard memory accesses.
The most immediate use for this is to allow proper handling of
predicated-false vector contiguous loads and predicated-false
micro-ops of vector gather loads (added in separate changesets).

Change-Id: Ice6894fe150faec2f2f7ab796a00c99ac843810a
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17991
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Bradley Wang <radwang@ucdavis.edu>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
src/cpu/base_dyn_inst.hh
src/cpu/base_dyn_inst_impl.hh
src/cpu/checker/cpu.hh
src/cpu/exec_context.hh
src/cpu/minor/exec_context.hh
src/cpu/o3/lsq_unit_impl.hh
src/cpu/simple/exec_context.hh
src/cpu/simple_thread.hh