rs6000-builtin.def (ST_ELEMREV_V1TI, [...]): Add macro expansion.
authorCarl Love <cel@us.ibm.com>
Mon, 22 Jan 2018 17:27:12 +0000 (17:27 +0000)
committerCarl Love <carll@gcc.gnu.org>
Mon, 22 Jan 2018 17:27:12 +0000 (17:27 +0000)
commitd10cff958f5e180817c088d3e80e9f22d1a8f172
tree4a8456d6b3aedb748fa02286b212b6b15c0b4c19
parentf25d7e06e2327990e34b317761d4bfc92f523bcf
rs6000-builtin.def (ST_ELEMREV_V1TI, [...]): Add macro expansion.

gcc/ChangeLog:

2018-01-22 Carl Love <cel@us.ibm.com>

* config/rs6000/rs6000-builtin.def (ST_ELEMREV_V1TI, LD_ELEMREV_V1TI,
LVX_V1TI): Add macro expansion.
* config/rs6000/rs6000-c.c (altivec_builtin_types): Add argument
definitions for VSX_BUILTIN_VEC_XST_BE, VSX_BUILTIN_VEC_ST,
VSX_BUILTIN_VEC_XL, LD_ELEMREV_V1TI builtins.
* config/rs6000/rs6000-p8swap.c (insn_is_swappable_p);
Change check to determine if the instruction is a byte reversing
entry.  Fix typo in comment.
* config/rs6000/rs6000.c (altivec_expand_builtin): Add case entry
for VSX_BUILTIN_ST_ELEMREV_V1TI and VSX_BUILTIN_LD_ELEMREV_V1TI.
Add def_builtin calls for new builtins.
* config/rs6000/vsx.md (vsx_st_elemrev_v1ti, vsx_ld_elemrev_v1ti):
Add define_insn expansion.

gcc/testsuite/ChangeLog:

2018-01-22  Carl Love  <cel@us.ibm.com>
* gcc.target/powerpc/powerpc.exp: Add torture tests for
builtins-4-runnable.c, builtins-6-runnable.c,
builtins-5-p9-runnable.c, builtins-6-p9-runnable.c.
* gcc.target/powerpc/builtins-6-runnable.c: New test file.
* gcc.target/powerpc/builtins-4-runnable.c: Add additional tests
for signed/unsigned 128-bit and long long int loads.

From-SVN: r256952
gcc/ChangeLog
gcc/config/rs6000/rs6000-builtin.def
gcc/config/rs6000/rs6000-c.c
gcc/config/rs6000/rs6000-p8swap.c
gcc/config/rs6000/rs6000.c
gcc/config/rs6000/vsx.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/builtins-4-runnable.c
gcc/testsuite/gcc.target/powerpc/builtins-6-runnable.c [new file with mode: 0644]
gcc/testsuite/gcc.target/powerpc/powerpc.exp