[AArch64] Use SVE UXT[BHW] as a form of predicated AND

[AArch64] Use SVE UXT[BHW] as a form of predicated AND

UXTB, UXTH and UXTW are equivalent to predicated ANDs with the constants
0xff, 0xffff and 0xffffffff respectively.  This patch uses them in the
patterns for IFN_COND_AND.

2019-08-14  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64.c (aarch64_print_operand): Allow %e to
	take the equivalent mask, as well as a bit count.
	* config/aarch64/predicates.md (aarch64_sve_uxtb_immediate)
	(aarch64_sve_uxth_immediate, aarch64_sve_uxt_immediate)
	(aarch64_sve_pred_and_operand): New predicates.
	* config/aarch64/iterators.md (sve_pred_int_rhs2_operand): New
	code attribute.
	* config/aarch64/aarch64-sve.md
	(cond_<SVE_INT_BINARY:optab><SVE_I:mode>): Use it.
	(*cond_uxt<mode>_2, *cond_uxt<mode>_any): New patterns.

gcc/testsuite/
	* gcc.target/aarch64/sve/cond_uxt_1.c: New test.
	* gcc.target/aarch64/sve/cond_uxt_1_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_2.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_2_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_3.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_3_run.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_4.c: Likewise.
	* gcc.target/aarch64/sve/cond_uxt_4_run.c: Likewise.

From-SVN: r274479