Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53
authorClifford Wolf <clifford@clifford.at>
Tue, 2 Jul 2019 09:36:26 +0000 (11:36 +0200)
committerClifford Wolf <clifford@clifford.at>
Tue, 2 Jul 2019 09:36:26 +0000 (11:36 +0200)
commitd206eca03b8aa7bb982fb2486c02c90a61354066
tree076f2ecb015477a7f6783305ad901f14bf7950eb
parent0067dc44f3928833eede2b9bb40260be78e11a93
Fix read_verilog assert/assume/etc on default case label, fixes YosysHQ/SymbiYosys#53

Signed-off-by: Clifford Wolf <clifford@clifford.at>
frontends/verilog/verilog_lexer.l