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(parent: 96bba0c) | patch
arch-arm: Fix AArch32 branch instructions disassemble
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 27 Mar 2018 16:31:46 +0000 (17:31 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 6 Apr 2018 09:58:41 +0000 (09:58 +0000)
commitd251fab8514f7a209044b69688aa3615f112e57d
tree9c4b74297832bb048e3825189f1930c5b1126e7atree
parent96bba0c50cda359b23365e3cb3a3f295796b06e4commit | diff
arch-arm: Fix AArch32 branch instructions disassemble

This patch adds the generateDisassembly method for BranchReg, BranchImm
and BranchRegReg Base classes used by AArch32 branch instructions.

Change-Id: I6de015cc213335556d5187df3d4fcd765876262c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/9503
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/arch/arm/SConscript diff | blob | history
src/arch/arm/insts/branch.cc [new file with mode: 0644] blob
src/arch/arm/insts/branch.hh diff | blob | history