riscv: Define register index constants using literals

riscv: Define register index constants using literals

To make it clearer what the register indices are for the semantically
meaningful registers defined by src/arch/riscv/registers.hh, the
constants that were defined using other constants were changed to use
the literal values of those constants.  This also removes the need to
use the M5_VAR_USED attribute.

Change-Id: I7cccbe45d3d820deb5149a5925415735f6ae2e61
Reviewed-on: https://gem5-review.googlesource.com/4080
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Alec Roelke <ar4jc@virginia.edu>