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(parent: e0a81ed) | patch
fhdl.cd: rename ClockDomain.{reset→rst}.
authorwhitequark <whitequark@whitequark.org>
Thu, 13 Dec 2018 07:27:27 +0000 (07:27 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 13 Dec 2018 07:27:27 +0000 (07:27 +0000)
commitd2e2d00e45b15b13b10972c91e7db8eebb78abb7
treec3aff7c5f618b556d7e8f698b5d0249ee15cd2e5tree
parente0a81edf4d3f148812d6df294efcf94a4a039244commit | diff
fhdl.cd: rename ClockDomain.{reset→rst}.
nmigen/back/rtlil.py diff | blob | history
nmigen/fhdl/cd.py diff | blob | history
nmigen/fhdl/ir.py diff | blob | history