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re PR target/19235 (GCC generates SSE2 instructions for AthlonXP which doesn't suppor...
authorRichard Henderson <rth@redhat.com>
Tue, 4 Jan 2005 10:00:55 +0000 (02:00 -0800)
committerRichard Henderson <rth@gcc.gnu.org>
Tue, 4 Jan 2005 10:00:55 +0000 (02:00 -0800)
commitd30c94610f659937c248c3ee06f789fb2200fd38
treeb008982197840fff22fed360fd068a3ef0ecfc57tree
parent7d23434bbe5fcf17afa0f57f7cbddf985c8425cbcommit | diff
re PR target/19235 (GCC generates SSE2 instructions for AthlonXP which doesn't support them.)

        PR target/19235
        * config/i386/i386.md (movdi_2): Separate SSE1 and SSE2 alternatives.
        (mov<MMXMODEI>_internal): Likewise.
        (movdf_nointeger): Prefer Y while not preferring, but allowing, x.
        Add V2SF case; use it for SSE1; don't use TI.
        (movdf_integer): Likewise.
        (mov<SSEMODEI>_internal, movti_internal): Force V4SF for SSE1.

From-SVN: r92889
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