xilinx: Add correct signed behaviour to DSP48E1 model
authorDavid Shah <dave@ds0.me>
Tue, 16 Jul 2019 16:53:08 +0000 (17:53 +0100)
committerDavid Shah <dave@ds0.me>
Tue, 16 Jul 2019 16:53:08 +0000 (17:53 +0100)
commitd38df68d26f1644539e5116e6b6c360e1c389cc9
tree9fdb7f6af418e0f6ce36818a2f53aab08cf16c46
parent95c8d27b0bfdea330a62a18825dea3691b4affe2
xilinx: Add correct signed behaviour to DSP48E1 model

Signed-off-by: David Shah <dave@ds0.me>
techlibs/xilinx/cells_sim.v