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(parent: 76358df) | patch
arch-riscv: Update register file
authorYifei Liu <liu.ad2039@gmail.com>
Wed, 14 Aug 2019 04:48:54 +0000 (21:48 -0700)
committerYIFEI LIU <liu.ad2039@gmail.com>
Wed, 21 Aug 2019 17:52:54 +0000 (17:52 +0000)
commitd3a87a87b493e7b676d37017561f70773b91bef0
tree4348c5f6b599b20ee78ee16c5b32cf777fde68d8tree
parent76358df574d655f97aa223faf2b860a41271e920commit | diff
arch-riscv: Update register file

This patch adds mcounteren, scounteren according to Risc-V
Privileged Architectures V1.10.

Change-Id: I6e138a50710bc0a1e9d9c38a11fc7fcc09ed500e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20128
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Alec Roelke <alec.roelke@gmail.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Alec Roelke <alec.roelke@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/riscv/registers.hh diff | blob | history