mem: Downstream components consumes new crossbar delays
authorMarco Balboni <Marco.Balboni@ARM.com>
Mon, 2 Mar 2015 09:00:48 +0000 (04:00 -0500)
committerMarco Balboni <Marco.Balboni@ARM.com>
Mon, 2 Mar 2015 09:00:48 +0000 (04:00 -0500)
commitd4ef8368aa1dfb5e1e1ebe155c0fce1070046f83
treecedda2d21dbee8ba4ef40d828898d3430ea5df9b
parent36dc93a5fa09765b9d2bac402bb557d228effcad
mem: Downstream components consumes new crossbar delays

This patch makes the caches and memory controllers consume the delay
that is annotated to a packet by the crossbar. Previously many
components simply threw these delays away. Note that the devices still
do not pay for these delays.
src/mem/cache/cache_impl.hh
src/mem/dram_ctrl.cc
src/mem/dramsim2.cc