anlogic: add support for Eagle Distributed RAM
authorIcenowy Zheng <icenowy@aosc.io>
Fri, 14 Dec 2018 08:50:37 +0000 (16:50 +0800)
committerIcenowy Zheng <icenowy@aosc.io>
Mon, 17 Dec 2018 15:20:40 +0000 (23:20 +0800)
commitd53a2bd1d3ae3cfbc9ead0fc12999fe269628179
treee1381a28a5bcf902221a7a5e7016f342187e934c
parent634d7d1c1424c69d983c008cfd800c0d7db43379
anlogic: add support for Eagle Distributed RAM

The MSLICEs on the Eagle series of FPGA can be configured as Distributed
RAM.

Enable to synthesis to DRAM.

As the Anlogic software suite doesn't support any 'bx to exist in the
initializtion data of DRAM, do not enable the initialization support of
the inferred DRAM.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
techlibs/anlogic/Makefile.inc
techlibs/anlogic/drams.txt [new file with mode: 0644]
techlibs/anlogic/drams_map.v [new file with mode: 0644]
techlibs/anlogic/synth_anlogic.cc