arch-gcn3: make read2st64_b32 write proper registers
authorKyle Roarty <kyleroarty1716@gmail.com>
Wed, 5 Aug 2020 19:08:31 +0000 (14:08 -0500)
committerKyle Roarty <kyleroarty1716@gmail.com>
Thu, 13 Aug 2020 19:04:36 +0000 (19:04 +0000)
commitd542dc838e2489fc586fc1a698839df2bedeb5bd
treeaf26b909d8478f2b886b56b523fe8b952040b9ce
parentc07a3548c4b74ce80672711b6ce436fb9c162a42
arch-gcn3: make read2st64_b32 write proper registers

Per the GCN3 ISA, read2st64_b32 writes to consecutive registers

Change-Id: Ibc1672584a72cf7de12e06068a03fe304b34dce2
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32236
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Reviewed-by: Bradford Beckmann <brad.beckmann@amd.com>
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/gcn3/insts/instructions.cc