cpu: Enforce 1 interrupt controller per thread
authorAndreas Sandberg <andreas.sandberg@arm.com>
Fri, 20 Nov 2015 20:50:17 +0000 (14:50 -0600)
committerAndreas Sandberg <andreas.sandberg@arm.com>
Fri, 20 Nov 2015 20:50:17 +0000 (14:50 -0600)
commitd57a855e40e5d85024ce4a5dd31ad1e45897ee04
tree8d7ce03cd66781f7b2b08993897b65bedecbe133
parent90d430d5b3e0e322c07270bb168653eb4f5b2713
cpu: Enforce 1 interrupt controller per thread

Consider it a fatal configuration error if the number of interrupt
controllers doesn't match the number of threads in an SMT
configuration.
src/cpu/base.cc