vendor.fpga.lattice_ice40: enable SystemVerilog when reading .sv files.
authorwhitequark <cz@m-labs.hk>
Mon, 3 Jun 2019 03:01:56 +0000 (03:01 +0000)
committerwhitequark <cz@m-labs.hk>
Mon, 3 Jun 2019 03:01:56 +0000 (03:01 +0000)
commitd58ba677c6309e5bc6e2353f91bed2d06f573311
tree69decce615ee3bf52175f47663affe9b7166790a
parent8960936c952180904b88252aa7641445a97498e5
vendor.fpga.lattice_ice40: enable SystemVerilog when reading .sv files.
nmigen/vendor/fpga/lattice_ice40.py