sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
authorMike Frysinger <vapier@gentoo.org>
Fri, 12 Aug 2016 14:12:41 +0000 (22:12 +0800)
committerMike Frysinger <vapier@gentoo.org>
Mon, 12 Apr 2021 04:14:32 +0000 (00:14 -0400)
commitd5a71b1131778cf2a023855966831eb2457d50d6
tree77243d6b326ca6dfa0ebb60446a9bc518b11617e
parent32d715691aa037f2838b41fa257c2e239d67c134
sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code

Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
57 files changed:
sim/aarch64/ChangeLog
sim/aarch64/interp.c
sim/arm/ChangeLog
sim/arm/wrapper.c
sim/avr/ChangeLog
sim/avr/interp.c
sim/bfin/ChangeLog
sim/bfin/interp.c
sim/bpf/ChangeLog
sim/bpf/sim-if.c
sim/common/ChangeLog
sim/common/sim-cpu.c
sim/common/sim-cpu.h
sim/cr16/ChangeLog
sim/cr16/interp.c
sim/cris/ChangeLog
sim/cris/sim-if.c
sim/d10v/ChangeLog
sim/d10v/interp.c
sim/example-synacor/ChangeLog
sim/example-synacor/interp.c
sim/frv/ChangeLog
sim/frv/sim-if.c
sim/ft32/ChangeLog
sim/ft32/interp.c
sim/h8300/ChangeLog
sim/h8300/compile.c
sim/iq2000/ChangeLog
sim/iq2000/sim-if.c
sim/lm32/ChangeLog
sim/lm32/sim-if.c
sim/m32r/ChangeLog
sim/m32r/sim-if.c
sim/m68hc11/ChangeLog
sim/m68hc11/interp.c
sim/mcore/ChangeLog
sim/mcore/interp.c
sim/microblaze/ChangeLog
sim/microblaze/interp.c
sim/mips/ChangeLog
sim/mips/interp.c
sim/mn10300/ChangeLog
sim/mn10300/interp.c
sim/moxie/ChangeLog
sim/moxie/interp.c
sim/msp430/ChangeLog
sim/msp430/msp430-sim.c
sim/or1k/ChangeLog
sim/or1k/sim-if.c
sim/pru/ChangeLog
sim/pru/interp.c
sim/riscv/ChangeLog
sim/riscv/interp.c
sim/sh/ChangeLog
sim/sh/interp.c
sim/v850/ChangeLog
sim/v850/interp.c