DSP48E1 sim model: fix seq tests and add preadder tests
authorDavid Shah <dave@ds0.me>
Thu, 8 Aug 2019 10:18:37 +0000 (11:18 +0100)
committerDavid Shah <dave@ds0.me>
Thu, 8 Aug 2019 10:18:37 +0000 (11:18 +0100)
commitd60b3c0dc8ca9ce1b14c4acf2b602acc1fac00c5
treede262053843adbc7b4c3b520609eccc2b385e762
parente7dbe7bb3de256f0ea89eb07647799b1e8d65bbe
DSP48E1 sim model: fix seq tests and add preadder tests

Signed-off-by: David Shah <dave@ds0.me>
techlibs/xilinx/tests/test_dsp_model.sh
techlibs/xilinx/tests/test_dsp_model.v