sim: Add checkpoint parameters for VMA list
authorIan Jiang <ianjiang.ict@gmail.com>
Tue, 28 Jul 2020 06:41:33 +0000 (14:41 +0800)
committerIan Jiang <ianjiang.ict@gmail.com>
Fri, 7 Aug 2020 01:10:41 +0000 (01:10 +0000)
commitd60f649819f1a793396f13a11b079b8c28e80c5d
tree103415eb82d4acd22ec3c9a8f2a8616ab35f74cd
parent349cad77032c8a3c7f966e77e381517f162c9abd
sim: Add checkpoint parameters for VMA list

Add checkpoint parameters (together with corresponding serialization
and unserialization) for VMA list of class MemState into a separate
section named 'vmalist'.

Without these VMA list parameters, a page table fault will occur when
running with --restore-simpoint-checkpoint, because of an empty VMA
list. For example:

  $ ./build/RISCV/gem5.debug --debug-flags=Exec configs/example/se.py \
      -c tests/test-progs/hello/bin/riscv/linux/hello \
      --cpu-type=NonCachingSimpleCPU --restore-simpoint-checkpoint \
      --checkpoint-dir m5out/ -r 2
  ...
  2404000: system.switch_cpus: T0 : @_int_malloc+3392    : sd a5, 8(a0) \
      : MemWrite :  D=0x000000000001ed21 A=0x862e8
  panic: Page table fault when accessing virtual address 0x862e8
  ...

Example checkpoint output:

  [system.cpu.workload.vmalist]
  size=3

  [system.cpu.workload.vmalist.Vma0]
  name=stack
  addrRangeStart=...
  addrRangeEnd=...

  [system.cpu.workload.vmalist.Vma1]
  name=heap
  addrRangeStart=...
  addrRangeEnd=...

  [system.cpu.workload.vmalist.Vma2]
  ...

Change-Id: Ib2fa7ad2c34fe667ce95bc4b10a1affcf60d9c1f
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31875
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/sim/mem_state.hh