radeonsi: use a clever alignment for descriptor uploads
authorMarek Olšák <marek.olsak@amd.com>
Wed, 15 Feb 2017 17:29:34 +0000 (18:29 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 18 Feb 2017 00:22:08 +0000 (01:22 +0100)
commitd6c8c26851c5fe03a6a21b2280be216aae6bbe33
treeb9cd77e58e189ddec6ebd834c38638a3d9626077
parent6b73aafceb1eb8e81754e2f349826994de678466
radeonsi: use a clever alignment for descriptor uploads

Non-VBO descriptors won't be smaller than the cache line, so simply use
the cache line size.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_descriptors.c