Re: [libre-riscv-dev] Debug port (was Re: minimum viable ASIC)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 8 May 2020 22:19:00 +0000 (23:19 +0100)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Fri, 8 May 2020 22:19:34 +0000 (23:19 +0100)
commitd758753abba404a879707b75a371ec187a90a756
tree7536dd0232e1c138dfeb84c875d5f7e983c24355
parentdbe6038e6145125e8275c90a9800120d96f48d3c
Re: [libre-riscv-dev] Debug port (was Re: minimum viable ASIC)
67/13f11cd46c8c895e29e88ccb9a784d82203740 [new file with mode: 0644]