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(parent: 279dc4b) | patch
[AArch64] Add combine pattern for storing lane zero of a vector
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Mon, 5 Jun 2017 08:52:02 +0000 (08:52 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Mon, 5 Jun 2017 08:52:02 +0000 (08:52 +0000)
commitd83950138bd18b0c79f336513005cacfc0dcfdc7
treecfc8ea9bf517102b09175cd4e621302b1fa41679tree
parent279dc4b464e3cc207b1729d8a392240430c57f42commit | diff
[AArch64] Add combine pattern for storing lane zero of a vector

* config/aarch64/aarch64-simd.md (aarch64_store_lane0<mode>):
New pattern.

* gcc.target/aarch64/store_lane0_str_1.c: New test.

From-SVN: r248871
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64-simd.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/aarch64/store_lane0_str_1.c [new file with mode: 0644] blob