i965/blorp: Do gen6 stencil offsets up-front
authorJason Ekstrand <jason.ekstrand@intel.com>
Wed, 20 Jul 2016 02:59:16 +0000 (19:59 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Wed, 17 Aug 2016 21:46:22 +0000 (14:46 -0700)
commitd8644f3eb6d24c50f8fbad4820e5b9e7803d09c3
treec0bcaa20af38df4be6edff61ad61d30df2cf2f2b
parent406c503396b3b4ab01d97d3e90eb09f2ed10a281
i965/blorp: Do gen6 stencil offsets up-front

This keeps all of the nastyness of gen6 stencil on the i965 side of the API
line and lets us delete that nasty hand-rolled ISL-based offset path that
we were using for ALL_SLICES_AT_EACH_LOD.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_blorp.c
src/mesa/drivers/dri/i965/brw_blorp.h
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp