soc/interconnect: add AXILite SRAM
authorJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 08:58:34 +0000 (10:58 +0200)
committerJędrzej Boczar <jboczar@antmicro.com>
Wed, 15 Jul 2020 08:58:34 +0000 (10:58 +0200)
commitd8a242d86f56ff02c676f5678e060966840e0749
tree0fbb49c71d0b2f1c55f809ad4bf82f3b58fc920d
parentb692b2a3f126a0ae38a40c95ed9153fa77e44bfa
soc/interconnect: add AXILite SRAM
litex/soc/integration/soc.py
litex/soc/interconnect/axi.py