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(parent: 77672cd) | patch
nvc0/ir: allow tess eval output loads to be CSE'd
authorIlia Mirkin <imirkin@alum.mit.edu>
Thu, 30 Apr 2015 06:00:20 +0000 (02:00 -0400)
committerIlia Mirkin <imirkin@alum.mit.edu>
Thu, 23 Jul 2015 07:33:09 +0000 (03:33 -0400)
commitda89e75d9c6399c8fb0286460c91a77778c0eec9
treec0567de63534961bd464f70c9ba893cdbaf8a2e0tree
parent77672cdb64e9c19e974fe5985050709fc317498ecommit | diff
nvc0/ir: allow tess eval output loads to be CSE'd

These only happen for gl_TessCoord which are constant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp diff | blob | history