git.libre-soc.org Git - litex.git/commit

author	Florent Kermarrec <florent@enjoy-digital.fr>
	Sun, 23 Jun 2019 20:36:00 +0000 (22:36 +0200)
committer	Florent Kermarrec <florent@enjoy-digital.fr>
	Sun, 23 Jun 2019 21:23:56 +0000 (23:23 +0200)
commit	daa4307d9ea1c5fb1aceec2ca7406454c28eae31
tree	d79b867211f133505936e7052ea8246b09a9f423	tree
parent	361f9d0dff867f0c7597f3e87443da973eb4fc97	commit \| diff

add CONTRIBUTORS file and add copyright header to all files

116 files changed:

CONTRIBUTORS	[new file with mode: 0644]	blob
litex/boards/platforms/arty.py		diff \| blob \| history
litex/boards/platforms/avalanche.py		diff \| blob \| history
litex/boards/platforms/de0nano.py		diff \| blob \| history
litex/boards/platforms/de10lite.py		diff \| blob \| history
litex/boards/platforms/de1soc.py		diff \| blob \| history
litex/boards/platforms/de2_115.py		diff \| blob \| history
litex/boards/platforms/genesys2.py		diff \| blob \| history
litex/boards/platforms/kc705.py		diff \| blob \| history
litex/boards/platforms/kcu105.py		diff \| blob \| history
litex/boards/platforms/machxo3.py		diff \| blob \| history
litex/boards/platforms/netv2.py		diff \| blob \| history
litex/boards/platforms/nexys4ddr.py		diff \| blob \| history
litex/boards/platforms/nexys_video.py		diff \| blob \| history
litex/boards/platforms/sp605.py		diff \| blob \| history
litex/boards/platforms/tinyfpga_bx.py		diff \| blob \| history
litex/boards/platforms/ulx3s.py		diff \| blob \| history
litex/boards/platforms/versa_ecp3.py		diff \| blob \| history
litex/boards/platforms/versa_ecp5.py		diff \| blob \| history
litex/boards/targets/ac701.py		diff \| blob \| history
litex/boards/targets/arty.py		diff \| blob \| history
litex/boards/targets/de0nano.py		diff \| blob \| history
litex/boards/targets/de10lite.py		diff \| blob \| history
litex/boards/targets/de1soc.py		diff \| blob \| history
litex/boards/targets/de2_115.py		diff \| blob \| history
litex/boards/targets/genesys2.py		diff \| blob \| history
litex/boards/targets/kc705.py		diff \| blob \| history
litex/boards/targets/kcu105.py		diff \| blob \| history
litex/boards/targets/minispartan6.py		diff \| blob \| history
litex/boards/targets/netv2.py		diff \| blob \| history
litex/boards/targets/nexys4ddr.py		diff \| blob \| history
litex/boards/targets/nexys_video.py		diff \| blob \| history
litex/boards/targets/simple.py		diff \| blob \| history
litex/boards/targets/ulx3s.py		diff \| blob \| history
litex/boards/targets/versa_ecp5.py		diff \| blob \| history
litex/build/altera/common.py		diff \| blob \| history
litex/build/altera/platform.py		diff \| blob \| history
litex/build/altera/programmer.py		diff \| blob \| history
litex/build/altera/quartus.py		diff \| blob \| history
litex/build/generic_platform.py		diff \| blob \| history
litex/build/generic_programmer.py		diff \| blob \| history
litex/build/lattice/common.py		diff \| blob \| history
litex/build/lattice/diamond.py		diff \| blob \| history
litex/build/lattice/icestorm.py		diff \| blob \| history
litex/build/lattice/platform.py		diff \| blob \| history
litex/build/lattice/programmer.py		diff \| blob \| history
litex/build/lattice/trellis.py		diff \| blob \| history
litex/build/microsemi/common.py		diff \| blob \| history
litex/build/microsemi/platform.py		diff \| blob \| history
litex/build/openocd.py		diff \| blob \| history
litex/build/sim/config.py		diff \| blob \| history
litex/build/sim/platform.py		diff \| blob \| history
litex/build/sim/verilator.py		diff \| blob \| history
litex/build/tools.py		diff \| blob \| history
litex/build/xilinx/common.py		diff \| blob \| history
litex/build/xilinx/ise.py		diff \| blob \| history
litex/build/xilinx/platform.py		diff \| blob \| history
litex/build/xilinx/programmer.py		diff \| blob \| history
litex/gen/common.py		diff \| blob \| history
litex/gen/fhdl/verilog.py		diff \| blob \| history
litex/gen/sim/core.py		diff \| blob \| history
litex/gen/sim/vcd.py		diff \| blob \| history
litex/soc/cores/clock.py		diff \| blob \| history
litex/soc/cores/code_8b10b.py		diff \| blob \| history
litex/soc/cores/cpu/__init__.py		diff \| blob \| history
litex/soc/cores/cpu/lm32/core.py		diff \| blob \| history
litex/soc/cores/cpu/minerva/core.py		diff \| blob \| history
litex/soc/cores/cpu/mor1kx/core.py		diff \| blob \| history
litex/soc/cores/cpu/picorv32/core.py		diff \| blob \| history
litex/soc/cores/cpu/vexriscv/core.py		diff \| blob \| history
litex/soc/cores/dna.py		diff \| blob \| history
litex/soc/cores/frequency_meter.py		diff \| blob \| history
litex/soc/cores/gpio.py		diff \| blob \| history
litex/soc/cores/identifier.py		diff \| blob \| history
litex/soc/cores/nor_flash_16.py		diff \| blob \| history
litex/soc/cores/prbs.py		diff \| blob \| history
litex/soc/cores/spi.py		diff \| blob \| history
litex/soc/cores/spi_flash.py		diff \| blob \| history
litex/soc/cores/timer.py		diff \| blob \| history
litex/soc/cores/uart.py		diff \| blob \| history
litex/soc/cores/up5kspram.py		diff \| blob \| history
litex/soc/integration/builder.py		diff \| blob \| history
litex/soc/integration/cpu_interface.py		diff \| blob \| history
litex/soc/integration/soc_core.py		diff \| blob \| history
litex/soc/integration/soc_sdram.py		diff \| blob \| history
litex/soc/integration/soc_zynq.py		diff \| blob \| history
litex/soc/interconnect/avalon.py		diff \| blob \| history
litex/soc/interconnect/axi.py		diff \| blob \| history
litex/soc/interconnect/csr.py		diff \| blob \| history
litex/soc/interconnect/csr_bus.py		diff \| blob \| history
litex/soc/interconnect/csr_eventmanager.py		diff \| blob \| history
litex/soc/interconnect/stream.py		diff \| blob \| history
litex/soc/interconnect/stream_packet.py		diff \| blob \| history
litex/soc/interconnect/stream_sim.py		diff \| blob \| history
litex/soc/interconnect/wishbone.py		diff \| blob \| history
litex/soc/interconnect/wishbone2csr.py		diff \| blob \| history
litex/soc/interconnect/wishbonebridge.py		diff \| blob \| history
litex/soc/software/bios/boot.c		diff \| blob \| history
litex/soc/software/bios/isr.c		diff \| blob \| history
litex/soc/software/bios/main.c		diff \| blob \| history
litex/soc/software/bios/sdram.c		diff \| blob \| history
litex/soc/software/bios/sfl.h		diff \| blob \| history
litex/soc/software/libnet/microudp.c		diff \| blob \| history
litex/soc/software/libnet/tftp.c		diff \| blob \| history
litex/soc/software/mkmscimg.py		diff \| blob \| history
litex/tools/litex_client.py		diff \| blob \| history
litex/tools/litex_read_verilog.py		diff \| blob \| history
litex/tools/litex_server.py		diff \| blob \| history
litex/tools/litex_sim.py		diff \| blob \| history
litex/tools/litex_term.py		diff \| blob \| history
litex/tools/remote/comm_pcie.py		diff \| blob \| history
litex/tools/remote/comm_uart.py		diff \| blob \| history
litex/tools/remote/comm_udp.py		diff \| blob \| history
litex/tools/remote/comm_usb.py		diff \| blob \| history
litex/tools/remote/csr_builder.py		diff \| blob \| history
litex/tools/remote/etherbone.py		diff \| blob \| history

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