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(parent: 2d20303) | patch
intel/eu: Set flag [sub]register number differently for 3src
authorJason Ekstrand <jason.ekstrand@intel.com>
Tue, 29 May 2018 22:28:36 +0000 (15:28 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Mon, 4 Jun 2018 21:03:03 +0000 (14:03 -0700)
commitdb9675f5a4c68e39bb777eb7003f01854fd235dc
tree9a39c38fc3f504fbae077d10c56815c6b2d8296dtree
parent2d20303e1874a862117f526ee87789b00b049078commit | diff
intel/eu: Set flag [sub]register number differently for 3src

Prior to gen8, the flag [sub]register number is in a different spot on
3src instructions than on other instructions.  Starting with Broadwell,
they made it consistent.  This commit fixes bugs that occur when a
conditional modifier gets propagated into a 3src instruction such as a
MAD.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_eu_emit.c diff | blob | history