verilog_parser: turn S/R and R/R conflicts into hard errors.
authorwhitequark <whitequark@whitequark.org>
Thu, 9 Jul 2020 19:36:39 +0000 (19:36 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 9 Jul 2020 19:36:59 +0000 (19:36 +0000)
commitdc35ef05f93bf634e7f158869af48707233505e2
treefa0e269e60b12fd555e2d32e27c1532ab00868b0
parent9c120b89ace6c111aa4677616947d18d980b9c1a
verilog_parser: turn S/R and R/R conflicts into hard errors.

Fixes #2253.
frontends/verilog/Makefile.inc