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(parent: c4efd2d) | patch
examples: add concise UART example.
authorwhitequark <cz@m-labs.hk>
Thu, 27 Jun 2019 04:51:45 +0000 (04:51 +0000)
committerwhitequark <cz@m-labs.hk>
Thu, 27 Jun 2019 04:51:45 +0000 (04:51 +0000)
commitdc6d801c4d8b15eda12f6923e8da587a5ecdc008
tree9994418c0cd72d3b72112f8dd87d40045ad7eb08tree
parentc4efd2ddacf45fa10e414def41e2cc9c7b24a9b8commit | diff
examples: add concise UART example.

This example uses shift registers and counters instead of an explicit
FSM, which makes it very compact in terms of generated logic, and
more concise too.
examples/basic/uart.py [new file with mode: 0644] blob