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(parent: db27f2f) | patch
cxxrtl: keep the memory write queue sorted on insertion.
authorAsu <sdelang@sdelang.fr>
Wed, 22 Apr 2020 18:50:13 +0000 (20:50 +0200)
committerAsu <sdelang@sdelang.fr>
Wed, 22 Apr 2020 18:53:12 +0000 (20:53 +0200)
commitdc77563a6a0b0a812fa006a286e0ec6e091dbd3a
treea09e3a6381cb18d8d8c0e30b94017ead6d987f00tree
parentdb27f2f3786fa867bf7524aff6a5b72c89932620commit | diff
cxxrtl: keep the memory write queue sorted on insertion.

Strategically inserting the pending memory write in memory::update to keep the
queue sorted allows us to skip the queue sort in memory::commit.

The Minerva SRAM SoC runs ~7% faster as a result.
backends/cxxrtl/cxxrtl.h diff | blob | history