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(parent: 003c084) | patch
arch-arm: Decode SEVL instruction for A32 and T32 IS
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 28 Apr 2020 17:12:20 +0000 (18:12 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Mon, 4 May 2020 08:03:45 +0000 (08:03 +0000)
commitdcd5ca640273a80e0e1a49397060a3e92c4e224d
tree10847b6d02257d62466519546160fd096dbb3f9atree
parent003c08418f841e6697b1b6ed81de94f536cf190dcommit | diff
arch-arm: Decode SEVL instruction for A32 and T32 IS

The instruction had been defined but it was not used for AArch32

Change-Id: I2bb106e98647eaa1f4c71fffb541e76ac1688674
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/28450
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/isa/formats/branch.isa diff | blob | history
src/arch/arm/isa/formats/data.isa diff | blob | history