radv: Translate logic ops.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Mon, 14 May 2018 01:01:21 +0000 (03:01 +0200)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Mon, 14 May 2018 14:49:06 +0000 (16:49 +0200)
commitdd102405dea022f6c27bc42176f50f3bb2761ae6
tree27b185cb3546be06a16c198e19ad0b1035785939
parent62f50df7b79c273a0eb9bf769eded76933bddc3a
radv: Translate logic ops.

radeonsi could pass them through but the enum changed between
Gallium and Vulkan, so we have to translate.

In progress I made the register defines a bit more readable.

CC: 18.0 18.1 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100430
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
src/amd/common/sid.h
src/amd/vulkan/radv_pipeline.c