mem-ruby: LL/SC fixes
authorTimothy Hayes <timothy.hayes@arm.com>
Mon, 27 Apr 2020 14:03:26 +0000 (15:03 +0100)
committerPouya Fotouhi <pfotouhi@ucdavis.edu>
Sat, 2 May 2020 06:47:11 +0000 (06:47 +0000)
commitdd6cd33344044bee2f6a6341b233b0bdb619af94
treefadd44a26a738a08143d007fc4b96643f6a65e65
parent40b79073f0031337cea10624b0ebd73ed9f884cf
mem-ruby: LL/SC fixes

The implementation for load-linked/store-conditional did not work
correctly for multi-core simulations. Since load-links were treated as
stores, it was not possible for a line to have multiple readers which
often resulted in livelock when using these instructions to implemented
mutexes. This improved implementation treats load-linked instructions
similarly to loads but locks the line after a copy has been fetched
locally. Writes to a monitored address ensure the 'linked' property is
blown away and any subsequent store-conditional will fail.

Change-Id: I19bd74459e26732c92c8b594901936e6439fb073
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27103
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
src/mem/ruby/protocol/RubySlicc_Types.sm
src/mem/ruby/system/Sequencer.cc
src/mem/ruby/system/Sequencer.hh