xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325)
authorEddie Hung <eddie@fpgeh.com>
Wed, 23 Sep 2020 16:15:24 +0000 (09:15 -0700)
committerGitHub <noreply@github.com>
Wed, 23 Sep 2020 16:15:24 +0000 (09:15 -0700)
commitde79978372c1953e295fa262444cb0a28a246c5f
tree16164e73085755e4d9339b094110ffdbfe588a7e
parent81348d2dce84573db39fa081c4549c2e472e49ce
 xilinx: do not make DSP48E1 a whitebox for ABC9 by default (#2325)

* xilinx: eliminate SCCs from DSP48E1 model

* xilinx: add SCC test for DSP48E1

* Update techlibs/xilinx/cells_sim.v

* xilinx: Gate DSP48E1 being a whitebox behind ALLOW_WHITEBOX_DSP48E1

Have a test that checks it works through ABC9 when enabled
techlibs/xilinx/cells_sim.v
techlibs/xilinx/xc7_dsp_map.v
tests/arch/xilinx/dsp_abc9.ys [new file with mode: 0644]