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(parent: 84f5f3c) | patch
back.pysim: implement sim.add_clock(if_exists=True).
authorwhitequark <cz@m-labs.hk>
Fri, 23 Aug 2019 08:53:48 +0000 (08:53 +0000)
committerwhitequark <cz@m-labs.hk>
Fri, 23 Aug 2019 08:53:48 +0000 (08:53 +0000)
commitdeb5de556dba94526c9f867b94bdb9592ad5f2cf
tree9269a3a49235878e6c585bf881c0253b1af1db51tree
parent84f5f3c4238e7a79bd758d6e8a0a81495cf26aa0commit | diff
back.pysim: implement sim.add_clock(if_exists=True).
nmigen/back/pysim.py diff | blob | history
nmigen/test/test_sim.py diff | blob | history