Add verilator FPGA target
authorAnton Blanchard <anton@linux.ibm.com>
Mon, 7 Dec 2020 23:50:48 +0000 (10:50 +1100)
committerAnton Blanchard <anton@ozlabs.org>
Mon, 7 Dec 2020 23:56:41 +0000 (10:56 +1100)
commitdf8e1ca2a7a4c59ebaf4fb09a485a641c99c7c80
tree7cb85cd04cc5f4d7c597466d81d63c1e7109a32d
parent62d5b16c66dffa6c3f430830e355d63fd6400726
Add verilator FPGA target

Our Makefiles need some work, but for now create an FPGA target:

make FPGA_TARGET=verilator microwatt-verilator

ghdl and yosys can use containers using PODMAN=1 or DOCKER=1
options.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
Makefile