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(parent: 1d053bd) | patch
add modelsim simulation and start fixing init
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 26 Sep 2014 09:36:28 +0000 (11:36 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 26 Sep 2014 15:05:05 +0000 (17:05 +0200)
commitdfbec91a62de5f394c1df1af8c39d485b92a1dd4
tree4642343da8909feb58d02e14a90a6be110da3258tree
parent1d053bd7eee82c72740699149827db8f8c6b481fcommit | diff
add modelsim simulation and start fixing init
18 files changed:
lib/sata/k7sataphy/__init__.py diff | blob | history
lib/sata/k7sataphy/clocking.py diff | blob | history
lib/sata/k7sataphy/ctrl.py diff | blob | history
lib/sata/k7sataphy/gtx.py diff | blob | history
sim/compile_rtl.tcl [new file with mode: 0644] blob
sim/compile_tb.tcl [new file with mode: 0644] blob
sim/glbl.v [new file with mode: 0644] blob
sim/hdl_common/hdl_0in.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_common.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_formality.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_modelsim.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_ncsim.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_quartus.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_synopsys.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_synplify.tcl [new file with mode: 0644] blob
sim/hdl_common/hdl_xst.tcl [new file with mode: 0644] blob
sim/sim.do [new file with mode: 0644] blob
sim/top_tb.v [new file with mode: 0644] blob